
- ΠΠ°Π»ΠΈΡΠΈΠ΅: ΠΠΎΠ΄ Π·Π°ΠΊΠ°Π· 3-4 Π½Π΅Π΄Π΅Π»ΠΈ
REAL TIME CLOCK-RTC, BCD, 44 X 8, LCC-28.
The DP8570AV/NOPB is a Timer Control Peripheral (TCP) intended for use in microprocessor based systems where information is required for multi-tasking, data logging or general time of day/date information. This device is implemented in low voltage silicon gate microCMOS technology to provide low standby power in battery back-up environments. The circuits architecture is such that it looks like a contiguous block of memory or I/O ports. The address space is organized as 2 software selectable pages of 32 bytes. This includes the control registers, the clock counters, the alarm compare RAM, the timers and their data RAM and the time save RAM. Any of the RAM locations that are not being used for their intended purpose may be used as general purpose CMOS RAM. Time and date are maintained from 1/100 of a second to year and leap year in a BCD format, 12 or 24-hour modes. Day of week, day of month and day of year counters are provided.
Π₯Π°ΡΠ°ΠΊΡΠ΅ΡΠΈΡΡΠΈΠΊΠΈ | |
SVHC (ΠΡΠΎΠ±ΠΎ ΠΠΏΠ°ΡΠ½ΡΠ΅ ΠΠ΅ΡΠ΅ΡΡΠ²Π°) | No SVHC (15-Jun-2015) |
ΠΠΎΠ»ΠΈΡΠ΅ΡΡΠ²ΠΎ ΠΡΠ²ΠΎΠ΄ΠΎΠ² | 28Π²ΡΠ²ΠΎΠ΄(-ΠΎΠ²) |
ΠΠΈΠ½ΠΈΡ ΠΡΠΎΠ΄ΡΠΊΡΠΈΠΈ | - |
ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | 85Β°C |
ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 5.5Π |
ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | -40Β°C |
ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 4.5Π |
Π‘ΡΠΈΠ»Ρ ΠΠΎΡΠΏΡΡΠ° ΠΠ‘ Π’Π°ΠΊΡΠΎΠ²ΠΎΠ³ΠΎ ΠΠ΅Π½Π΅ΡΠ°ΡΠΎΡΠ° | LCC |
Π’ΠΈΠΏ ΠΠ½ΡΠ΅ΡΡΠ΅ΠΉΡΠ° ΠΠ‘ | ΠΠ°ΡΠ°Π»Π»Π΅Π»ΡΠ½ΡΠΉ |
Π’ΠΈΠΏ ΠΠΈΠΊΡΠΎΡΡ Π΅ΠΌΡ Π’Π°ΠΉΠΌΠ΅ΡΠ° | Π§Π°ΡΡ Π Π΅Π°Π»ΡΠ½ΠΎΠ³ΠΎ ΠΡΠ΅ΠΌΠ΅Π½ΠΈ |
Π£ΠΏΠ°ΠΊΠΎΠ²ΠΊΠ° | ΠΠΎΡΡΡΡΠ½ΠΎ |
Π£ΡΠΎΠ²Π΅Π½Ρ Π§ΡΠ²ΡΡΠ²ΠΈΡΠ΅Π»ΡΠ½ΠΎΡΡΠΈ ΠΊ ΠΠ»Π°ΠΆΠ½ΠΎΡΡΠΈ (MSL) | MSL 2A - 4 Π½Π΅Π΄Π΅Π»ΠΈ |
Π€ΠΎΡΠΌΠ°Ρ ΠΡΠ΅ΠΌΠ΅Π½ΠΈ | 12Ρ / 24Ρ |
Π€ΠΎΡΠΌΠ°Ρ ΠΠ°Π½Π½ΡΡ | ΠΠ²ΠΎΠΈΡΠ½ΠΎ-Π΄Π΅ΡΡΡΠΈΡΠ½ΡΠΉ ΠΊΠΎΠ΄ |