
- ΠΠ°Π»ΠΈΡΠΈΠ΅: ΠΠΎΠ΄ Π·Π°ΠΊΠ°Π· 3-4 Π½Π΅Π΄Π΅Π»ΠΈ
- ΠΡΡΠΈΠΊΡΠ»: NB2305AI1DR2G
CLK BUFFER, 5 O/P, 133MHZ, NSOIC-8.
The NB2305AI1DR2G is a Zero Delay Buffer designed to distribute high-speed clocks. It accepts one reference input and drives out five low-skew clocks. It operates at up to 133MHz and has higher drive than the -1 devices. It has on-chip PLL's that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. Multiple NB2305A devices can accept the same input clock and distribute it. In this case the skew between the outputs of the two devices is guaranteed to be less than 700ps. All outputs have less than 200ps of cycle-to-cycle jitter. The input and output propagation delay is guaranteed to be less than 350ps and the output to output skew is guaranteed to be less than 250ps.
| Π₯Π°ΡΠ°ΠΊΡΠ΅ΡΠΈΡΡΠΈΠΊΠΈ | |
| SVHC (ΠΡΠΎΠ±ΠΎ ΠΠΏΠ°ΡΠ½ΡΠ΅ ΠΠ΅ΡΠ΅ΡΡΠ²Π°) | No SVHC (17-Dec-2015) |
| ΠΠΎΠ»ΠΈΡΠ΅ΡΡΠ²ΠΎ ΠΡΠ²ΠΎΠ΄ΠΎΠ² | 8Π²ΡΠ²ΠΎΠ΄(-ΠΎΠ²) |
| ΠΠΎΠ»ΠΈΡΠ΅ΡΡΠ²ΠΎ ΠΡΡ ΠΎΠ΄ΠΎΠ² | 5Π²ΡΡ ΠΎΠ΄(-ΠΎΠ²) |
| ΠΠΈΠ½ΠΈΡ ΠΡΠΎΠ΄ΡΠΊΡΠΈΠΈ | - |
| ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | 85 Β°C |
| ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 3.6Π |
| ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | -40 Β°C |
| ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 3Π |
| Π‘ΡΠΈΠ»Ρ ΠΠΎΡΠΏΡΡΠ° ΠΠ‘ Π’Π°ΠΊΡΠΎΠ²ΠΎΠ³ΠΎ ΠΠ΅Π½Π΅ΡΠ°ΡΠΎΡΠ° | NSOIC |
| Π’ΠΈΠΏ ΠΠΈΠΊΡΠΎΡΡ Π΅ΠΌΡ Π’Π°ΠΉΠΌΠ΅ΡΠ° | ΠΡΡΠ΅Ρ Π’Π°ΠΊΡΠΎΠ²ΡΡ Π‘ΠΈΠ³Π½Π°Π»ΠΎΠ² |
| Π£ΠΏΠ°ΠΊΠΎΠ²ΠΊΠ° | Π Π°Π·ΡΠ΅Π·Π½Π°Ρ ΠΠ΅Π½ΡΠ° |
| Π£ΡΠΎΠ²Π΅Π½Ρ Π§ΡΠ²ΡΡΠ²ΠΈΡΠ΅Π»ΡΠ½ΠΎΡΡΠΈ ΠΊ ΠΠ»Π°ΠΆΠ½ΠΎΡΡΠΈ (MSL) | MSL 1 - ΠΠ΅Π·Π»ΠΈΠΌΠΈΡΠ½ΡΠΉ |
| Π§Π°ΡΡΠΎΡΠ° | 133ΠΠΡ |