Полупроводники - Микросхемы

Буфер / драйвер, инвертирующий, 2В до 6В, DIP-20...

Буфер / драйвер, инвертирующий, 3 состояния, 2В до 6В, TSSOP-20...

LOGIC, BUFF/DVR TRI-ST OCTAL, 20DIP.The SN74AC241N is an octal Buffer and Line Driver designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers and bus-oriented receivers and transmitters. The SN74AC241 device is organized as two 4-bit buffers/driv..

LOGIC, BUFF/DVR TRI-ST OCTAL, 20TSSOP...

Восьмеричный буфер / драйвер, неинвертирующий, 3 состояния, 2В до 6В, SOIC-20.The SN74AC244DW is an octal Buffer and Line Driver designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers and bus-oriented receivers and transmitters. The SN74AC244 de..

Буфер / линейный драйвер, неинвертирующий, 74AC244, 2В - 6В, SOIC-20...

Буфер / драйвер линии, неинвертирующий, 3 состояния, 2В до 6В, DIP-20.The SN74AC244N is an octal Buffer and Line Driver designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers and bus-oriented receivers and transmitters. The SN74AC244 devices are..

Буфер / драйвер линии, неинвертирующий, 3 состояния, 2В до 6В, TSSOP-20...

Буфер / драйвер линии, неинвертирующий, 2В до 6В, TSSOP-20.The SN74AC244PWR is an octal Buffer and Line Driver designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers and bus-oriented receivers and transmitters. The SN74AC244 devices are organize..

Приемопередатчик, неинвертирующий, 3 состояния, 2В до 6В, SOIC-20.The SN74AC245DW is an octal Bus Transceiver with 3-state outputs. It is designed for asynchronous 2-way communication between data buses. The control-function implementation minimizes external timing requirements. When the output-enab..

Приемопередатчик, неинвертирующий, 2В до 6В, SOIC-20...

Приемопередатчик, неинвертирующий, 2В до 6В, DIP-20.The SN74AC245N is an octal Bus Transceiver with 3-state outputs. It is designed for asynchronous 2-way communication between data buses. The control-function implementation minimizes external timing requirements. When the output-enable (OE)\ is low..