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SN74LS373DW

IC, OCTAL D LATCH, SMD, 74LC373.


The SN74LS373DW is an octal transparent D Latch with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. These devices are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. The eight latch of the LS373 ate transparent D-type latches, meaning that while the enable (C or CLK) input is high, the Q outputs follow the data (D) inputs. When C or CLK is taken low, the output is latched at the level of the data that was set up. Schmitt-trigger buffered inputs at the enable/clock lines of the S373 device simplify system design as AC and DC noise rejection is improved by typically 400mV due to the input hysteresis.

Π₯арактСристики
SVHC (Особо ΠžΠΏΠ°ΡΠ½Ρ‹Π΅ ВСщСства)No SVHC (15-Jun-2015)
Π’Ρ‹Ρ…ΠΎΠ΄Π½ΠΎΠΉ Π’ΠΎΠΊ24мА
Π—Π°Π΄Π΅Ρ€ΠΆΠΊΠ° РаспространСния12нс
ΠšΠΎΠ»ΠΈΡ‡Π΅ΡΡ‚Π²ΠΎ Π‘ΠΈΡ‚8Π±ΠΈΡ‚
ΠšΠΎΠ»ΠΈΡ‡Π΅ΡΡ‚Π²ΠΎ Π’Ρ‹Π²ΠΎΠ΄ΠΎΠ²20Π²Ρ‹Π²ΠΎΠ΄(-ΠΎΠ²)
Линия ΠŸΡ€ΠΎΠ΄ΡƒΠΊΡ†ΠΈΠΈ-
Максимальная Рабочая Π’Π΅ΠΌΠΏΠ΅Ρ€Π°Ρ‚ΡƒΡ€Π°70Β°C
МаксимальноС НапряТСниС ΠŸΠΈΡ‚Π°Π½ΠΈΡ5.25Π’
Минимальная Рабочая Π’Π΅ΠΌΠΏΠ΅Ρ€Π°Ρ‚ΡƒΡ€Π°0Β°C
МинимальноС НапряТСниС ΠŸΠΈΡ‚Π°Π½ΠΈΡ4.75Π’
Π‘Ρ‚ΠΈΠ»ΡŒ ΠšΠΎΡ€ΠΏΡƒΡΠ° ΠœΠΈΠΊΡ€ΠΎΡΡ…Π΅ΠΌΡ‹ Π›ΠΎΠ³ΠΈΠΊΠΈSOIC
Π’ΠΈΠΏ Π’Ρ‹Ρ…ΠΎΠ΄Π° ΠœΠΈΠΊΡ€ΠΎΡΡ…Π΅ΠΌΡ‹Π‘ ВрСмя Бостояниями
Π’ΠΈΠΏ Π—Π°Ρ‰Π΅Π»ΠΊΠΈΠŸΡ€ΠΎΠ·Ρ€Π°Ρ‡Π½Π°Ρ D Π’ΠΈΠΏΠ°
Π£ΠΏΠ°ΠΊΠΎΠ²ΠΊΠ°ΠŸΠΎΡˆΡ‚ΡƒΡ‡Π½ΠΎ
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