
- ΠΠ°Π»ΠΈΡΠΈΠ΅: ΠΠΎΠ΄ Π·Π°ΠΊΠ°Π· 3-4 Π½Π΅Π΄Π΅Π»ΠΈ
- ΠΡΡΠΈΠΊΡΠ»: SN65LVDS33PW
LVDS LINE RECEIVER, 400MBPS, TSSOP-16.
The SN65LVDS33PW is a quad LVDS Data Line Receiver offers the widest common-mode input voltage range in the industry. This receiver provides an input voltage range specification compatible with a 5V PECL signal as well as an overall increased ground-noise tolerance. Precise control of the differential input voltage thresholds allows for inclusion of 50mV of input voltage hysteresis to improve noise rejection on slowly changing input signals. The input thresholds are still no more than Β±50mV over the full input common-mode voltage range. The high-speed switching of LVDS signals usually necessitates the use of a line impedance matching resistor at the receiving-end of the cable or transmission media. The non-terminated SN65LVDS series is available for multidrop or other termination circuits. The receivers can withstand Β±15kV human-body model (HBM) and Β±600V machine model (MM) electrostatic discharges to the receiver input pins with respect to ground without damage.
| Π₯Π°ΡΠ°ΠΊΡΠ΅ΡΠΈΡΡΠΈΠΊΠΈ | |
| SVHC (ΠΡΠΎΠ±ΠΎ ΠΠΏΠ°ΡΠ½ΡΠ΅ ΠΠ΅ΡΠ΅ΡΡΠ²Π°) | No SVHC (15-Jun-2015) |
| ΠΠΎΠ»ΠΈΡΠ΅ΡΡΠ²ΠΎ ΠΡΠ²ΠΎΠ΄ΠΎΠ² | 16Π²ΡΠ²ΠΎΠ΄(-ΠΎΠ²) |
| ΠΠΈΠ½ΠΈΡ ΠΡΠΎΠ΄ΡΠΊΡΠΈΠΈ | - |
| ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | 85Β°C |
| ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 3.6Π |
| ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | -40Β°C |
| ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 3Π |
| Π‘ΡΠΈΠ»Ρ ΠΠΎΡΠΏΡΡΠ° ΠΡΠΈΠ²ΠΎΠ΄Π° | TSSOP |
| Π’ΠΈΠΏ ΡΡΡΡΠΎΠΉΡΡΠ²Π° | ΠΠΈΡΡΠ΅ΡΠ΅Π½ΡΠΈΠ°Π»ΡΠ½ΡΠΉ ΠΠΈΠ½Π΅ΠΉΠ½ΡΠΉ ΠΡΠΈΠ΅ΠΌΠ½ΠΈΠΊ |
| Π£ΠΏΠ°ΠΊΠΎΠ²ΠΊΠ° | ΠΠΎΡΡΡΡΠ½ΠΎ |
| Π£ΡΠΎΠ²Π΅Π½Ρ Π§ΡΠ²ΡΡΠ²ΠΈΡΠ΅Π»ΡΠ½ΠΎΡΡΠΈ ΠΊ ΠΠ»Π°ΠΆΠ½ΠΎΡΡΠΈ (MSL) | MSL 1 - ΠΠ΅Π·Π»ΠΈΠΌΠΈΡΠ½ΡΠΉ |