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CD74HC237M

LOGIC, DECODER/DEMUX HS 3-8, 16SOIC.


The CD74HC237M is a 3-to-8 high speed CMOS Decoder/Demutiplexer with address latches. It is well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic. It three binary select inputs (A0, A1 and A2) that can be latched by an active high LE signal to isolate the outputs from select-input changes. A "Low" LE makes the output transparent to the input and the circuit functions as one-of-eight decoder. Two Output Enable inputs (OE\1 and OE0) are provided to simplify cascading and to facilitate demultiplexing. The demultiplexing function is accomplished by using the A0, A1, A2 inputs to select the desired output and using one of the other Output Enable inputs as the data input while holding the other output enable input in its active state.

Π₯арактСристики
SVHC (Особо ΠžΠΏΠ°ΡΠ½Ρ‹Π΅ ВСщСства)No SVHC (15-Jun-2015)
ΠšΠΎΠ»ΠΈΡ‡Π΅ΡΡ‚Π²ΠΎ Π’Ρ‹Π²ΠΎΠ΄ΠΎΠ²16Π²Ρ‹Π²ΠΎΠ΄(-ΠΎΠ²)
ΠšΠΎΠ»ΠΈΡ‡Π΅ΡΡ‚Π²ΠΎ Π’Ρ‹Ρ…ΠΎΠ΄ΠΎΠ²8Π²Ρ‹Ρ…ΠΎΠ΄(-ΠΎΠ²)
Линия ΠŸΡ€ΠΎΠ΄ΡƒΠΊΡ†ΠΈΠΈ-
Максимальная Рабочая Π’Π΅ΠΌΠΏΠ΅Ρ€Π°Ρ‚ΡƒΡ€Π°125Β°C
МаксимальноС НапряТСниС ΠŸΠΈΡ‚Π°Π½ΠΈΡ6Π’
Минимальная Рабочая Π’Π΅ΠΌΠΏΠ΅Ρ€Π°Ρ‚ΡƒΡ€Π°-55Β°C
МинимальноС НапряТСниС ΠŸΠΈΡ‚Π°Π½ΠΈΡ2Π’
Π‘Ρ‚ΠΈΠ»ΡŒ ΠšΠΎΡ€ΠΏΡƒΡΠ° ΠœΠΈΠΊΡ€ΠΎΡΡ…Π΅ΠΌΡ‹ Π›ΠΎΠ³ΠΈΠΊΠΈSOIC
Π’ΠΈΠΏ Π›ΠΎΠ³ΠΈΠΊΠΈΠ”Π΅ΠΊΠΎΠ΄Π΅Ρ€ / Π”Π΅ΠΌΡƒΠ»ΡŒΡ‚ΠΈΠΏΠ»Π΅ΠΊΡΠΎΡ€
Π£ΠΏΠ°ΠΊΠΎΠ²ΠΊΠ°ΠŸΠΎΡˆΡ‚ΡƒΡ‡Π½ΠΎ
Π£Ρ€ΠΎΠ²Π΅Π½ΡŒ Π§ΡƒΠ²ΡΡ‚Π²ΠΈΡ‚Π΅Π»ΡŒΠ½ΠΎΡΡ‚ΠΈ ΠΊ ВлаТности (MSL)MSL 1 - Π‘Π΅Π·Π»ΠΈΠΌΠΈΡ‚Π½Ρ‹ΠΉ