
- ΠΠ°Π»ΠΈΡΠΈΠ΅: ΠΠΎΠ΄ Π·Π°ΠΊΠ°Π· 3-4 Π½Π΅Π΄Π΅Π»ΠΈ
74HCT CMOS, 74HCT259, DIP16, 5.5V.
The CD74HCT259E is a 8-bit CMOS Addressable Latch features the low-power consumption associated with CMOS circuitry and has speeds comparable to low-power Schottky. It latches three active modes and one RESET mode. When both the LE\ and master RESET (MR\) inputs are low (8-line demultiplexer mode) the output of the addressed latch follows the data input and all other outputs are forced low. When both MR\ and LE\ are high (memory mode), all outputs are isolated from the data input, i.e., all latches hold the last data presented before the LE\ transition from low to high. A condition of LE\ low and MR\ high (addressable latch mode) allows the addressed latch's output to follow the data input, all other latches are unaffected. The RESET mode (all outputs low) results when LE\ is high and MR\ is low.
Π₯Π°ΡΠ°ΠΊΡΠ΅ΡΠΈΡΡΠΈΠΊΠΈ | |
SVHC (ΠΡΠΎΠ±ΠΎ ΠΠΏΠ°ΡΠ½ΡΠ΅ ΠΠ΅ΡΠ΅ΡΡΠ²Π°) | No SVHC (15-Jun-2015) |
ΠΡΡ ΠΎΠ΄Π½ΠΎΠΉ Π’ΠΎΠΊ | 4ΠΌΠ |
ΠΠ°Π΄Π΅ΡΠΆΠΊΠ° Π Π°ΡΠΏΡΠΎΡΡΡΠ°Π½Π΅Π½ΠΈΡ | 16Π½Ρ |
ΠΠΎΠ»ΠΈΡΠ΅ΡΡΠ²ΠΎ ΠΠΈΡ | 8Π±ΠΈΡ |
ΠΠΎΠ»ΠΈΡΠ΅ΡΡΠ²ΠΎ ΠΡΠ²ΠΎΠ΄ΠΎΠ² | 16Π²ΡΠ²ΠΎΠ΄(-ΠΎΠ²) |
ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | 125Β°C |
ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 5.5Π |
ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | -55Β°C |
ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 4.5Π |
Π‘ΡΠΈΠ»Ρ ΠΠΎΡΠΏΡΡΠ° ΠΠΈΠΊΡΠΎΡΡ Π΅ΠΌΡ ΠΠΎΠ³ΠΈΠΊΠΈ | DIP |
Π’ΠΈΠΏ ΠΡΡ ΠΎΠ΄Π° ΠΠΈΠΊΡΠΎΡΡ Π΅ΠΌΡ | Π‘ΡΠ°Π½Π΄Π°ΡΡΠ½ΡΠΉ |
Π’ΠΈΠΏ ΠΠ°ΡΠ΅Π»ΠΊΠΈ | ΠΠ΄ΡΠ΅ΡΡΠ΅ΠΌΠ°Ρ |
Π£ΠΏΠ°ΠΊΠΎΠ²ΠΊΠ° | ΠΠΎΡΡΡΡΠ½ΠΎ |
Π£ΡΠΎΠ²Π΅Π½Ρ Π§ΡΠ²ΡΡΠ²ΠΈΡΠ΅Π»ΡΠ½ΠΎΡΡΠΈ ΠΊ ΠΠ»Π°ΠΆΠ½ΠΎΡΡΠΈ (MSL) | - |