
CD74HC138M
- ΠΠ°Π»ΠΈΡΠΈΠ΅: ΠΠΎΠ΄ Π·Π°ΠΊΠ°Π· 3-4 Π½Π΅Π΄Π΅Π»ΠΈ
- ΠΡΡΠΈΠΊΡΠ»: CD74HC138M
65 β½
IC, HI SPEED CMOS, SMD, 74HC138.
The CD74HC138M is a 3-to-8 line high speed CMOS Decoder/Demultiplexer well suited to memory address decoding or data routing applications. It features low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low power Schottky TTL logic. It has three binary select inputs (A0, A1 and A2). If the device is enabled, these inputs determine which one of the eight normally high outputs of the HC/HCT138 series will go low. Two active low and one active high enables (E1\, E2\ and E3) are provided to ease the cascading of decoders. The decoder's 8 outputs can drive 10 low power Schottky TTL equivalent loads.
| Π₯Π°ΡΠ°ΠΊΡΠ΅ΡΠΈΡΡΠΈΠΊΠΈ | |
| SVHC (ΠΡΠΎΠ±ΠΎ ΠΠΏΠ°ΡΠ½ΡΠ΅ ΠΠ΅ΡΠ΅ΡΡΠ²Π°) | No SVHC (15-Jun-2015) |
| ΠΠΎΠ»ΠΈΡΠ΅ΡΡΠ²ΠΎ ΠΡΠ²ΠΎΠ΄ΠΎΠ² | 16Π²ΡΠ²ΠΎΠ΄(-ΠΎΠ²) |
| ΠΠΎΠ»ΠΈΡΠ΅ΡΡΠ²ΠΎ ΠΡΡ ΠΎΠ΄ΠΎΠ² | 8Π²ΡΡ ΠΎΠ΄(-ΠΎΠ²) |
| ΠΠΈΠ½ΠΈΡ ΠΡΠΎΠ΄ΡΠΊΡΠΈΠΈ | - |
| ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | 125Β°C |
| ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 6Π |
| ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | -55Β°C |
| ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 2Π |
| Π‘ΡΠΈΠ»Ρ ΠΠΎΡΠΏΡΡΠ° ΠΠΈΠΊΡΠΎΡΡ Π΅ΠΌΡ ΠΠΎΠ³ΠΈΠΊΠΈ | SOIC |
| Π’ΠΈΠΏ ΠΠΎΠ³ΠΈΠΊΠΈ | ΠΠ΅ΠΊΠΎΠ΄Π΅Ρ / ΠΠ΅ΠΌΡΠ»ΡΡΠΈΠΏΠ»Π΅ΠΊΡΠΎΡ |
| Π£ΠΏΠ°ΠΊΠΎΠ²ΠΊΠ° | ΠΠΎΡΡΡΡΠ½ΠΎ |
| Π£ΡΠΎΠ²Π΅Π½Ρ Π§ΡΠ²ΡΡΠ²ΠΈΡΠ΅Π»ΡΠ½ΠΎΡΡΠΈ ΠΊ ΠΠ»Π°ΠΆΠ½ΠΎΡΡΠΈ (MSL) | MSL 1 - ΠΠ΅Π·Π»ΠΈΠΌΠΈΡΠ½ΡΠΉ |