MC14555BDG

4000 CMOS, SMD, 4555, SOIC16, 15V.

The MC14555BDG is a dual binary to 1-of-4 Decoder/Demultiplexer constructed with complementary MOS (CMOS) enhancement mode devices. Each decoder/demultiplexer has two select inputs (A and B), an active low Enable input (E) and four mutually exclusive outputs (Q0, Q1, Q2, Q3). The MC14555B has the selected output go to the 'high' state. Expanded decoding such as binary-to-hexadecimal (1-of-16), etc., can be achieved by using other MC14555B devices. Applications include code conversion, address decoding, memory selection control and demultiplexing (using the Enable input as a data input) in digital data transmission systems. It is capable of driving two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.