SN74LVTH273DW

Триггер, со сбросом, неинвертированный, положительный фронт, D, 3.2 нс, 150 МГц, 64 мА, SOIC.

The SN74LVTH273DW is an octal D-type Flip-flop with clear. It is designed specifically for low-voltage (3.3V) VCC operation, but with the capability to provide a TTL interface to a 5V system environment. Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D-input signal has no effect at the output. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pull-up or pull-down resistors with the bus-hold circuitry is not recommended. It is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.