CD74HC112E

Триггер, с установкой и сбросом, дополнительный выход, отрицательный фронт, JK, 14 нс, 60 МГц.

The CD74HC112E is a dual negative-edge-triggered J-K Flip-flop with set and reset. It utilizes silicon-gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. It exhibits the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads. This flip-flop has independent J, K, Set, Reset and clock inputs and Q and Q\ outputs. It changes state on the negative-going transition of the clock pulse. Set and Reset are accomplished asynchronously by low-level inputs. The HCT logic family is functionally as well as pin-compatible with the standard LS logic family.