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CD40192BE

IC, COUNTER/MULTIPLIER/DIVIDER.


The CD40192BE is a CMOS presettable BCD Up/Down Counter for use with multistage ripple counting and synchronous frequency dividers. This device consists of 4 synchronously clocked, gated D type flip-flops connected as a counter. The inputs consist of 4 individual jam lines, a preset/enable/control, individual clock up and clock down signals and a master reset. Four buffered Q signal outputs as well as carry/and borrow/outputs for multiple-stage counting schemes are provided. The counter is cleared so that all outputs are in a low state by a high on the reset line. A reset is accomplished asynchronously with the clock. Each output is individually programmable asynchronously with the clock to the level on the corresponding jam input when the preset/enable/control is low. The counter counts up one count on the positive clock edge of the clock up signal provided the clock down line is high.

Π₯арактСристики
SVHC (Особо ΠžΠΏΠ°ΡΠ½Ρ‹Π΅ ВСщСства)No SVHC (15-Jun-2015)
ΠšΠΎΠ»ΠΈΡ‡Π΅ΡΡ‚Π²ΠΎ Π’Ρ‹Π²ΠΎΠ΄ΠΎΠ²16Π²Ρ‹Π²ΠΎΠ΄(-ΠΎΠ²)
Линия ΠŸΡ€ΠΎΠ΄ΡƒΠΊΡ†ΠΈΠΈCD4000 LOGIC Series
Максимальная Рабочая Π’Π΅ΠΌΠΏΠ΅Ρ€Π°Ρ‚ΡƒΡ€Π°125Β°C
МаксимальноС НапряТСниС ΠŸΠΈΡ‚Π°Π½ΠΈΡ18Π’
ΠœΠ°ΠΊΡΠΈΠΌΠ°Π»ΡŒΠ½Ρ‹ΠΉ Π‘Ρ‡Π΅Ρ‚9
Минимальная Рабочая Π’Π΅ΠΌΠΏΠ΅Ρ€Π°Ρ‚ΡƒΡ€Π°-55Β°C
МинимальноС НапряТСниС ΠŸΠΈΡ‚Π°Π½ΠΈΡ3Π’
Π‘Ρ‚ΠΈΠ»ΡŒ ΠšΠΎΡ€ΠΏΡƒΡΠ° ΠœΠΈΠΊΡ€ΠΎΡΡ…Π΅ΠΌΡ‹ Π›ΠΎΠ³ΠΈΠΊΠΈDIP
Вактовая Частота11ΠœΠ“Ρ†
Π’ΠΈΠΏ Π‘Ρ‡Π΅Ρ‚Ρ‡ΠΈΠΊΠ°Π”Π²ΠΎΠΈΡ‡Π½ΠΎ-дСсятичный, Π’Π²Π΅Ρ€Ρ… / Π’Π½ΠΈΠ·
Π£ΠΏΠ°ΠΊΠΎΠ²ΠΊΠ°ΠŸΠΎΡˆΡ‚ΡƒΡ‡Π½ΠΎ
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