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SN74LVC373APWR

SN74LVC373APWR

IC, 74LVC, SMD, 74LVC373, TSSOP20.


The SN74LVC373APWR is an octal transparent D Latch with 3-state outputs. It is designed for 1.65 to 3.6V VCC operation. While the LE input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered OE\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE\ does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

Π₯арактСристики
SVHC (Особо ΠžΠΏΠ°ΡΠ½Ρ‹Π΅ ВСщСства)No SVHC (15-Jun-2015)
Π’Ρ‹Ρ…ΠΎΠ΄Π½ΠΎΠΉ Π’ΠΎΠΊ24мА
Π—Π°Π΄Π΅Ρ€ΠΆΠΊΠ° РаспространСния6.8нс
ΠšΠΎΠ»ΠΈΡ‡Π΅ΡΡ‚Π²ΠΎ Π‘ΠΈΡ‚8Π±ΠΈΡ‚
ΠšΠΎΠ»ΠΈΡ‡Π΅ΡΡ‚Π²ΠΎ Π’Ρ‹Π²ΠΎΠ΄ΠΎΠ²20Π²Ρ‹Π²ΠΎΠ΄(-ΠΎΠ²)
Линия ΠŸΡ€ΠΎΠ΄ΡƒΠΊΡ†ΠΈΠΈ-
Максимальная Рабочая Π’Π΅ΠΌΠΏΠ΅Ρ€Π°Ρ‚ΡƒΡ€Π°85Β°C
МаксимальноС НапряТСниС ΠŸΠΈΡ‚Π°Π½ΠΈΡ3.6Π’
Минимальная Рабочая Π’Π΅ΠΌΠΏΠ΅Ρ€Π°Ρ‚ΡƒΡ€Π°-40Β°C
МинимальноС НапряТСниС ΠŸΠΈΡ‚Π°Π½ΠΈΡ1.65Π’
Π‘Ρ‚ΠΈΠ»ΡŒ ΠšΠΎΡ€ΠΏΡƒΡΠ° ΠœΠΈΠΊΡ€ΠΎΡΡ…Π΅ΠΌΡ‹ Π›ΠΎΠ³ΠΈΠΊΠΈTSSOP
Π’ΠΈΠΏ Π’Ρ‹Ρ…ΠΎΠ΄Π° ΠœΠΈΠΊΡ€ΠΎΡΡ…Π΅ΠΌΡ‹Π‘ ВрСмя Бостояниями
Π’ΠΈΠΏ Π—Π°Ρ‰Π΅Π»ΠΊΠΈΠŸΡ€ΠΎΠ·Ρ€Π°Ρ‡Π½Π°Ρ D Π’ΠΈΠΏΠ°
УпаковкаРазрСзная Π›Π΅Π½Ρ‚Π°
Π£Ρ€ΠΎΠ²Π΅Π½ΡŒ Π§ΡƒΠ²ΡΡ‚Π²ΠΈΡ‚Π΅Π»ΡŒΠ½ΠΎΡΡ‚ΠΈ ΠΊ ВлаТности (MSL)MSL 1 - Π‘Π΅Π·Π»ΠΈΠΌΠΈΡ‚Π½Ρ‹ΠΉ