
- ΠΠ°Π»ΠΈΡΠΈΠ΅: ΠΠΎΠ΄ Π·Π°ΠΊΠ°Π· 3-4 Π½Π΅Π΄Π΅Π»ΠΈ
FIFO, 15MHZ, SOIC-16.
The CD74HCT40105MT is a 4-bit by 16-word high speed CMOS FIFO Register compatible with the CD40105B,except for 'shift-out' circuitry. It is a low-power first-in-out (FIFO) 'elastic' storage register that can store 16 four-bit words. The 40105 is capable of handling input and output data at different shifting rates. This feature makes particularly useful as a buffer between asynchronous systems. Each work position in the register is clocked by a control flip-flop, which stores a marker bit. A '1' signifies that the position's data is filled and a '0' denotes a vacancy in that position. The control flip-flop detects the state of the preceding flip-flop and communicates its own status to the succeeding flip-flop. When a control flip-flop is in the '0' state and sees a '1' in the preceeding flip-flop, it generates a clock pulse that transfers data from the preceding four data latches into its own four data latches and resets the preceding flip-flop to '0'.
Π₯Π°ΡΠ°ΠΊΡΠ΅ΡΠΈΡΡΠΈΠΊΠΈ | |
SVHC (ΠΡΠΎΠ±ΠΎ ΠΠΏΠ°ΡΠ½ΡΠ΅ ΠΠ΅ΡΠ΅ΡΡΠ²Π°) | No SVHC (15-Jun-2015) |
ΠΡΠ΅ΠΌΡ ΠΠΎΡΡΡΠΏΠ° | - |
ΠΠΎΠ»ΠΈΡΠ΅ΡΡΠ²ΠΎ ΠΡΠ²ΠΎΠ΄ΠΎΠ² | 16 Π²ΡΠ²ΠΎΠ΄(-ΠΎΠ²) |
ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | 125 Β°C |
ΠΠ°ΠΊΡΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 5.5Π |
ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½Π°Ρ Π Π°Π±ΠΎΡΠ°Ρ Π’Π΅ΠΌΠΏΠ΅ΡΠ°ΡΡΡΠ° | -55Β°C |
ΠΠΈΠ½ΠΈΠΌΠ°Π»ΡΠ½ΠΎΠ΅ ΠΠ°ΠΏΡΡΠΆΠ΅Π½ΠΈΠ΅ ΠΠΈΡΠ°Π½ΠΈΡ | 4.5Π |
ΠΡΠ³Π°Π½ΠΈΠ·Π°ΡΠΈΡ ΠΠ°ΠΌΡΡΠΈ | 16 x 4Π±ΠΈΡ |
Π‘ΡΠΈΠ»Ρ ΠΠΎΡΠΏΡΡΠ° ΠΠΈΠΊΡΠΎΡΡ Π΅ΠΌΡ ΠΠΎΠ³ΠΈΠΊΠΈ | SOIC |
Π£ΠΏΠ°ΠΊΠΎΠ²ΠΊΠ° | ΠΠ΅Π½ΡΠ° ΠΈ ΠΠ°ΡΡΡΠΊΠ°/ΠΠΎΠ±ΠΈΠ½Π° |
Π£ΡΠΎΠ²Π΅Π½Ρ Π§ΡΠ²ΡΡΠ²ΠΈΡΠ΅Π»ΡΠ½ΠΎΡΡΠΈ ΠΊ ΠΠ»Π°ΠΆΠ½ΠΎΡΡΠΈ (MSL) | MSL 1 - ΠΠ΅Π·Π»ΠΈΠΌΠΈΡΠ½ΡΠΉ |
Π€ΡΠ½ΠΊΡΠΈΡ FIFO | ΠΡΠΈΠ½Ρ ΡΠΎΠ½Π½ΡΠΉ |
Π§Π°ΡΡΠΎΡΠ° | 15ΠΠΡ |