CD74HCT390M

LOGIC, DUAL DECADE RIP CONTR, 16SOIC.

The CD74HCT390M is a 4-bit high speed CMOS dual Decade Ripple Counter pin compatible with low-power Schottky TTL (LSTTL). It is divided into four separately clocked sections. The counter has two divide-by-2 sections and two divide-by-5 sections. These sections are normally used in a BCD decade or bi quinary configuration, since they share a common master reset (nMR). If the two master reset inputs (1MR and 2MR) are used to simultaneously clear all 8 bits of the counter, a number of counting configurations are possible within one package. The separate clock inputs of each section allow ripple counter or frequency division applications of divide-by-2, 4. 5, 10, 20, 25, 50 or 100. Each section is triggered by the high-to-low transition of the input pulses. For BCD decade operation, the nQ0 output is connected to the nCP1\ input of the divide-by-5 section. For bi-quinary decade operation, the nO3 output is connected to the nCP0\ input and nQ0 becomes the decade output.