SN74LS374DW

Триггер, неинвертированный на 3 состояния, положительный фронт, D, 15 нс, 50 МГц, 24 мА, SOIC.

The SN74LS374DW is an octal edge triggered D-type Flip-flop with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. These devices are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. On the positive transition of the clock, the Q outputs are set to the logic states that were set up at the D inputs. A buffered output-control (OC) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. OC\ does not affect the internal operation of the latches or flip-flops.