CD4027BPW

Триггер, JK, 45 нс, 24 МГц, 6.8 мА, TSSOP, 16 вывод(-ов).

The CD4027BPW is a CMOS dual J-K Master-slave Flip-flop useful in performing control, register and toggle functions. Logic levels present at the J and K inputs along with internal self-steering control the state of each flip-flop, changes in the flip-flop state are synchronous with the positive-going transition of the clock pulse. Set and reset functions are independent of the clock and are initiated when a high level signal is present at either the Set or Reset input. Each flip-flop has provisions for individual J, K, set, reset and Clock input signals. Buffered Q and Q\ signals are provided as outputs. This input-output arrangement provides for compatible operation with the RCA-CD4013B dual D-type flip-flop.