SN65MLVD082DGG

Триггер, TSSOP, 64 вывод(-ов).

The SN65MLVD082DGG is a 8-channel half-duplex M-LVDS Transceiver for transmitting and receiving multipoint-low-voltage differential signals in full compliance with the TIA/EIA-899 (M-LVDS) standard. The driver outputs have been designed to supports multipoint buses presenting loads as low as 30R and incorporates controlled transition times to allow for stubs off of the backbone transmission line. This M-LVDS standard defined receiver implements a failsafe by using an offset threshold. In addition, the driver rise and fall times are between 1 and 1.5ns, complying with the M-LVDS standard to provide operation at 250Mbps while also accommodating stubs on the bus. Receiver outputs are slew rate controlled to reduce EMI and crosstalk effects associated with large current surges. The M-LVDS standard allows for 32 nodes on the bus providing a high-speed replacement for RS-485 where lower common-mode can be tolerated or when higher signalling rates are needed.